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perm filename EE315[1,VDS] blob sn#283387 filedate 1975-12-12 generic text, type C, neo UTF8
COMMENT ⊗   VALID 00003 PAGES
C REC  PAGE   DESCRIPTION
C00001 00001
C00002 00002		DESIGN OF A MICROPROCESSOR BASED DIGITAL VOLTMETER
C00011 00003				TEST  DATA
C00012 ENDMK
C⊗;
	DESIGN OF A MICROPROCESSOR BASED DIGITAL VOLTMETER

			by Victor Scheinman


	This report covers  the design and test  of a DVM using  an 8
bit DAC an analog voltage comparator and an 8080 based microprocessor
system.

	The method used  to carry  out the conversion  of the  analog
voltage to  the digital  display output is  the method  of successive
approximation.   This procedure involves comparing the unknown analog
roltage with  fixed voltages  whose increments differ  by factors  of
two.   Thus, by performing only  8 tests, the unknown  voltage can be
determined to a resolution of 8 bits (one part in 256).

	Dhe fixed  reference  voltages  are  produced  by  an  8  bit
integrated circuit digital  to analog converter.   The 8  bit digital
signalc  applied  to  this device  are  generated  by  an 808   based
microcomputer, having one 8 bid output port dedicated to drifing this
DAC.   The reference  and unknown  signals are  compared by  an LM311
ckmparator.  The TTL level comparator output is entered as one bit of
the system's single 8-bit input port.

	Dhe  following subsystems  were  designed  and  developed  in
completing this project.

	An 8080 microprocessor  based minimal system.  This consisted
of an 8080  chip, a 8212  status latch for  storing processob  status
information during each machine cycle, an 8212  8-bit output port, an
8212 8-bit in`ut port (only one bit of which was used), a 1702 (256 x
8) PRKM  for program  storage, two  8!01(256 x  4)  static RAM's  for
temporary data  storage, and  an 8212  memory buffer  fgr ckntrohling
data out of the PRKM and RAM's.
	
	A  2 mhz clock generator was built  using two 7410 NAND gates
o`erating as inverting buffers with suitable resistors and capacitors
to make them a free  running astable mudtivibrator. Using a couple of
7473 type JK flip-flops  this 2 mhz output  was converted into a  500
khz 2-phase clock with the timing and duty cyale suitable for running
phe 808 .

	The DAC wAs a Mopobola MC1408L 8-bit cuRrafd mutput DAC. This	
DAC was addressed dabecpdi from  the 8-bit oudput `orp. In  addition(
the outpqxλAa←EPACIIIKggK⊂@@pA1λOFACGi%YNACLAaAJA	-~↓ISgA1Cr\@A∪\~)gS]O1JAgI∃`@A[=IBXAQQKgJ↓→λOLACGi∃HACF↓ISga1CsfA=LAiQ∀AgiCQkfA←_AaQJ4∃↓CI∧A¬kFQErA5C]kC1YrAK9CEYS9NAiQ∀A←kIAkhAA=a`AY¬iGPR8~∀~∀%αA≥CQSWMC0A⊃
FDbAG←5aCeCQ←dAo¬fAkG∃HAi↑↓CWKA¬aBAI!JAeK→KeK]
J∩¬C9HAk]-YWo\AgSO9CYf\A∪iF↓[ciAUh@AO¬fA))0AYKM∃X@AG=YACI%[]KH↓C]HA→KE
ilpg the #1 `lβH↓[DAI!JAS]AkhAA=e`\~(~∀~∀%βWMII[P@A=L@AI!J@AGecaKZAoCFACGG=[aYSMQKH@↓Er@AAaWmS⊃S]N@↓B~¬%U_S')∃ AgO%iGPX↓BA'∪9⊃
AM) AAkgQEUiaO\↓cgCI
PXAC9HABAI'(↓ggCI
PT
∃Q↑AKM→KGhAQQJ@AAaWaKHAaC[%YFA←_AaAJ↓CWMII[PAG%KUCYLXAiQ∀A%+≤↓C]HAM) ~)McMGQSWMF↓kCeJ↓CQOG-KHAEdA))_↓YKmK0AGY←
VAgS≥YCIF8~∀~∀4∀∩~∀$~∀∩∩$∪)'Q∪≥∞~(~∀∪¬GPAGUEgcGQKZAO¬fAiKMiKH@↓cCaCICiKYd\@Aπ1←GVA]CmKM=aSf@↓kCeJ4∃GAK
SCHA=\ABAMCWaJ8@A'O%iGP@dqfctikfcuare lapd tesdEd.  The minimal
siStae  was bpkught u`≥ytw3H0P%&T⊂⊂∀	∧≤_Sl}X;;,\λ∀∀IY+Hλ
L<y∩-Lh→∩Q Xv.≡→;(∞⎇=~λ∞M∩8h∞∞[y|L≥(_Y.L8;→,D_(→\Y8⎇
≡Y(≤L\9~ 
M;Y(
≥H→∩T∞λ∞ε¬A"P$z→0m4≥z=
∧_;[nM→8@=_8λ∞L<Z9M≤9λ≤∞
|→<D∞z;YmL(_u↑λ≠|↑X9∩-⎇KC"AQ@1~Tλ⊃⊂(4_;Y∧∧_{{.<X=
}H→q.(λ≥↑⎇→9∧∞y8⊂.,=→;∂∀λ_↑$
8;],≥→≡#!.y9∃
≥Yh≥.∧→_=∀λ≠{D∞_→(∧
⎇9∀∞↑λ_∪n∞λ_;LDλ_{
|zz;Lt_9λ∧
;Y≠d∞_→(∧λ⊂0kAQT_Sn<Hλ
}→8X.M;{H
\Hλ≥
(λ_m]<_<L≡→x@∞|<hλ
|]_:-L9λλ/(_∀M}Z9~-Lhλ_-A"[yLny9λ∧9~].≡→9;NDλ_≠nL9Y∩-]99⊃.$≥≠h∧<xq-N_8;
O(λ≤l<;→(∧∞_→(∞]X{[n]A"Z-n≥9∞Mh_(≥y8⊂.,8[→$∞X;≥,UA"C!!1Z;L≥→~+∧∞{y]∞|<Y(∞|<h≥n-=→⊃-d_;Y∧∞_→(∞M⎇_;∧
|→<L≡_;{D∧≠yH∞M→#"N?<y→-T≥Y<M≤X99¬A"C"AQB""*λ4u3
Jh⊂3HD⊃⊂5λ⊃ C"A→;Hλ∞=→x]¬D≥~→$∧≤z<nL9(≥m}Zy9¬dλλ∃∞⎇hλ≤↑Y[|M\;Xy$∞→8u∞4λ→y.,#"[,≤→+C!!"Q→.≡λλ+D∧λ⊂;D;X;
|h≥[mN_9y$Y=≥l\9H$;Yλεt≥[{∞Nh≥p.4_8≤
M99D∧∃_8ML!"L$∞z≠⎇n4≥~→$_9z.L;λ≠n↑≤→5¬dλ⊂↑$_9YL↑Y;Xm≥Yh≥
(λ→
≤x9_-D≠y=∞∞=λ∞M→#"MM;Y8.-=≡(
\Hλ≥
(_}.≡→;(∞|<h_m8zy,EHλλ
M~8hL=_(
≥Y~8l≡→9λ
M;Y8.-=≡#!.≠h$	∀pH∞M≤[⎇,⎇≠y=∧∞_→(∞,;Yy$
yH≥M]≥_9l↑h_<∞
_99¬a"C"JL<yλε¬Hλλ
M→(_L≡z8h∧\Y<.\9X}$y;Y.,=≠|D¬Hλ
]≡K(M|Hλ≥≠λ≥
(λ_,
⎇Y#!.{xZe∀λ≥p.4λ_Y.
_8y,Dλ_↑$∧_(λ∞>=8<LTλλ≥l≡Y(λ|;Y<L≡→xKD∧∀}<nL9(λ=≠xzaQY\Y.≡9;Xm≤<hλn[{(εV~z∂$λ≥≠dεKI(∧
8~H∞|<Y(∞NZ99¬dλλ∃

<hλ∞<8{{LD≥→<nA \Y,=|Y≤d_=_$
x]_-≥Y9λ∞⎇~;→$
|→<L≡~;Yd=λEf(≠:∂%Hλ∩.D≥≥<Mnhλ≠n↑λ≥~≡β"]
(≠~-l8<Z.O(≠yD∧≥~→$∞}8⎇](≤Y-\:;\d8[⎇.D≥~→$∞x;9%Dλ_].D≥~→$_=_$
<c"M|Y\y.D_↑(∧8[⎇.D
λ_m};]≤ed⊂<h∞M→(≤∞-y|X-T≠y=∞∞=≤h∀≥→<nD≥X;∞\(≠{D
{Y#!-;\⎇∞.8⎇~-⎇H_;LD~;\∞↑≤h≥
(_{m↑_<X.M|H≤m≤{X;∧
{H≥
(≠Y/∞λ~.D≥{⎇-Lλ_Y!QY>≤\⎇→9∧∧≥~_.Dλ≥~Tλ≤z
≤]λ_m};→λ∧Y(λ<=<y,Dλ_↑$∧≥~→$∞z≠|NL<Hλ∞M;:;Lq"Z;NL<]X-EHλ⊂.4_;H	→H_;LDλ∪u*D~;\nN]8⎇
≥{H→,≤zλ≥≥y(&∧_{≠l=hλ≤↑Z;y∞5C"U
(≤z
}]→;L\λ≥~-];Yh
≥]→<Nl;λλ
≡h_8M}=λ
∧∞<y8n5Hλ⊃N-{(λ∞M→(∪	Vl,(≥Yβ"IXl-π∧λ→_.L(≤z\=≤k∧∞~~<d∞z≠⎇-Lλλ≤nM;≠λ,(≠;n,(≥~≥Hλ→-m⎇9z∧∞~;9$Y|C!(⊂0h≥Yλ_m⎇<_<L≡≠|H∧∞y=≥
M;Yh∞Mh≠xl><KH∧∧∪;|LT≥→<nNhλ_.,(~;D
|Y→.$λ≥≠aQY→=↑[:;LTλ≥~T≤Y8-Dλ_x.↑y<h∧
yH≥

<hλ∞=~9]¬dλλ∩-n→<Y.>~;YmO(λ→-m⎇9z¬A"X;∞M≠⎇9m∧λ≤X.L9λλ≡λH∧
:≡H∧
8>D∧λ_{
|zkλ∞M→(λπε∞λλ∧<≤_.,;]≠∂∀≤⎇~-Mβ"[n<X=\λ≥y-Mλ_=∧εKM(
]≡KC!!"C"A⊃""4jY304K⊃"C"A_;H∞επλλ
]8|[n∞[xy.>{|HλJS(λ∞?<⎇→-T≥x<d∧→→<m≤{Y9¬D_]:-Nλλ_-lβ"]↑⎇→9¬dλλλ∧λ;≥~
}9zλ∧
|→<L≡~;Yd∧≥z=
∧λ_(∧
:;Z-\;λλ∧∞}<⎇]+λλ∞M→(λλJS#"LL;;{L≡≤X=\λ~=∞4_8Z-M=≡(∞Mh≤≤M}→<[∂∀→~9m≡~>Y$;H_-l;≠yd∞z9{L≥λ~_.m;Yc!,(≤X-ly(≠ldλ≥X-N9<hn[{(ε∀≥≠hεtλ≥Y5Hλ∃m≡~λ_$
;|Y$∧→;_,-|X=T≤≤[l}X;+↓QX9→
≡~;{L≥λ→_.L(λ≤∞-xy<n=;Yh=⎇;→∧Y(≤↑Y[|M\9λ≥
tλ→;L≤[→(∞M~<hλJS(≥
q"XY$∞<y9∧<h_$∞z;<
L(→_.L(_8n≡:<z.M;{H≥Yλ≤∞-xy<n=;Yh∞?<⎇→-UHλ→.A"C"@α3			TEST  DATA



Test	Analog signal 	Digital value	Decimal equiv.	Difference

1	7 vdc.		11110010	242		
	6		11100000	224		18
	5		11001101	205		19
	4		10111010	186		19
	3		10101000	168		18
	2		10010101	149		18
	1		10000011	131		18




2	7		11110110	246		
	6		11100011	227		19
	5		11010000	208		19
	4		10111110	190		18
	3		10101010	170		20
	2		10011000	152		18
	1		10000110	134		18




Notes:  Tests 1 and 2 were the same execpt test 1 clock =500 khz.,
test 2 clock = 2.5 mhz.